NT3H2211W0FHKH Datasheet, PDF (65/77 Pages) NXP Semiconductors – NTAG I2C plus, NFC Forum Type 2 Tag compliant IC with I2C interface

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
RF field
FD pin
ON
OFF
HIGH
LOW
I2C_LOCKED
0
1
RF_LOCKED
0
1
0
SRAM_I2C_READY
0
1
RF_FIELD_PRESENT
1
PTHRU_ON_OFF = 0b,
FD_ON = 11b, FD_OFF = 11b
SRAM_MIRROR_ON_OFF = 0b
3Dh
7Dh
TRANSFER_DIR = 1b
Event
0
1
0
0
0
3Dh
t
more data available?
aaa-021660
Fig 29. Illustration of the Field detection feature in combination with the pass-through mode
for data transfer from NFC to I²C
11.3.3 I²C to NFC Data transfer
If the I²C interface is enabled (I2C_LOCKED is 1b) and data is written to the terminator
block FBh of the SRAM via the I²C interface, at the end of the WRITE command, bit
SRAM_RF_READY is set to 1b and bit I2C_LOCKED is automatically reset to 0b to set
the tag in the arbitration idle state.
The RF_LOCKED bit is then automatically set to 1b (according to the interface
arbitration). After a READ or FAST_READ command involving the terminator page of the
SRAM, bit SRAM_RF_READY and bit RF_LOCKED are automatically reset to 0b
allowing the I²C interface to further write data into the SRAM buffer.
To signal to the host that further data is ready to be written, the following mechanisms are
in place:
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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