NT3H2211W0FHKH Datasheet, PDF (27/77 Pages) NXP Semiconductors – NTAG I2C plus, NFC Forum Type 2 Tag compliant IC with I2C interface

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
Table 13. Configuration bytes
Bit Field
Access Access Default Description
via NFC via I²C values
Configuration register: NC_REG
7 NFCS_I2C_RST_ON_OFF R&W R&W 0b
Enables the NFC silence feature and enables soft
reset through I²C repeated start - see Section 9.3
6 _{PTHRU_ON_OFF}
R%&W R&W 0b
1b: pass-through mode using SRAM enabled and
SRAM mapped to end of Sector 0.
0b: pass-through mode disabled
5-4 FD_OFF
R&W R&W 00b
defines the event upon which the signal output on the
FD pin is pulled up
00b: if the field is switched off
01b: if the field is switched off or the tag is set to the
HALT state
10b: if the field is switched off or the last page of the
NDEF message has been read (defined in
LAST_NDEF_BLOCK)
11b: (if FD_ON = 11b) if the field is switched off or if
last data is read by I²C (in pass-through mode NFC --->
I²C) or last data is written by I²C (in pass-through mode
I²C---> NFC)
11b: (if FD_ON = 00b or 01b or 10b) if the field is
switched off
See Section 8.4 for more details
3-2 FD_ON
R&W R&W 00b
defines the event upon which the signal output on the
FD pin is pulled down
00b: if the field is switched on
01b: by first valid start of communication (SoC)
10b: by selection of the tag
11b: (in pass-through mode NFC-->I²C) if the data is
ready to be read from the I²C interface
11b: (in pass-through mode I²C--> NFC) if the data is
read by the NFC interface
See Section 8.4 for more details
1 SRAM_MIRROR_ON_OFF R&W R&W 0b
1b: SRAM mirror enabled and mirrored SRAM starts at
page SRAM_MIRROR_BLOCK
0b: SRAM mirror disabled
0 TRANSFER_DIR
R&W R&W 1b
defines the data flow direction for the data transfer
0b: From I²C to NFC interface
1b: From NFC to I²C interface
In case the pass-through mode is not enabled
0b: no WRITE access from the NFC side
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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