TDA8023 Datasheet, PDF (22/32 Pages) NXP Semiconductors – Low power IC card interface

NXP Semiconductors
TDA8023
Low power IC card interface
Table 20. Interface signals to host controller …continued
V_DD = 3.3 V; V_DD(INTF) = 1.5 V; f_CLKIN = 10 MHz; GND = 0 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ Max
I²C-bus timing; see Figure 7
f_SCL
SCL clock frequency
t_BUF
bus free time between a STOP
and START condition
0
- 400
1.3
--
t_HD;STA hold time (repeated) START hold time after which first
0.6
condition
clock pulse is generated
--
t_LOW
t_HIGH
t_SU;STA
LOW period of the SCL clock
HIGH period of the SCL clock
set-up time for a repeated
START condition
1.3
--
0.6
--
0.6
--
t_HD;DAT
t_SU;DAT
t_r
data hold time
data set-up time
rise time of both SDA and SCL
signals
[2] ₀
100
-
--
--
- 300
t_f
fall time of both SDA and SCL
signals
-
- 300
t_SU;STO set-up time for STOP condition
0.6
--
Unit
kHz
µs
µs
µs
µs
µs
ns
ns
ns
ns
µs
[1] Pin I/OUC has an internal 11 kΩ pull-up resistor to V_DD(INTF).
[2] The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be internally provided by
a transmitter.
Table 21. Protection and limitations
V_DD = 3.3 V; V_DD(INTF) = 1.5 V; f_CLKIN = 10 MHz; GND = 0 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
T_amb
ambient temperature
−40 -
T_sd
shutdown temperature
I_Ilim
input current limit
I_Olim
output current limit
at die
on pin I/O
on pin I/O
on pin CLK
-
150
[1] _{−15 -}
[1] _{−15 -}
−70 -
shutdown current; on pin RST
−20 -
shutdown current; on pin V_CC
-
−90
[1] Pin I/O has an internal 15 kΩ pull-up resistor to V_CC.
Max Unit
+85 °C
-
°C
+15 mA
+15 mA
+70 mA
+20 mA
-
mA
TDA8023_1
Product data sheet
Rev. 01 — 16 July 2007
© NXP B.V. 2007. All rights reserved.
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