TDA8023 Datasheet, PDF (20/32 Pages) NXP Semiconductors – Low power IC card interface

NXP Semiconductors
TDA8023
Low power IC card interface
Table 18. Card drivers …continued
V_DD = 3.3 V; V_DD(INTF) = 1.5 V; f_CLKIN = 10 MHz; GND = 0 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
I_pu
pull-up current
t_d
delay time
at pin I/O; V_OH = 0.9V_CC; C_L = 30 pF
between edges on pin I/O and pin
I/OUC; corresponds to width of active
pull-up pulse
[3] _−1
[3][4] _-
-
-
mA
500 650
ns
t_r
t_TLH
C_i
R_pu(int)
rise time
clock rise time
input capacitance
internal pull-up
resistance
inputs; from V_IL(max) to V_IH(min)
output transition time; from 10 % of V_CC
to 90 % of V_CC; C_L < 30 pF; no DC load
on pin I/O
between pin I/O and V_CC
-
-
[3] _-
[3] ₁₀
-
1.5
µs
-
0.1
µs
-
10
pF
13.5 17
kΩ
f_max
maximum input clock on pin I/O
frequency
[3] _-
-
500
kHz
Card presence input: pin PRES, active-HIGH when pin SPRES = LOW or active-LOW when pin SPRES = HIGH
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
I_LIL
LOW-level input leakage V_I = 0.3V_DD; pin SPRES = HIGH
current
V_I = 0.3V_DD; pin SPRES = LOW
I_LIH
HIGH-level input
leakage current
V_I = 0.7V_DD; pin SPRES = HIGH
V_I = 0.7V_DD; pin SPRES = LOW
-
-
0.7V_DD -
0
-
10
-
−40
-
−5
-
0.3V_DD V
-
V
5
µA
40
µA
−10
µA
0
µA
[1] Two ceramic multilayer capacitors of minimum 100 nF with low Equivalent Series Resistance (ESR) should be used in order to meet
these specifications.
[2] Output voltage towards the card, including ripple.
[3] Pin I/O has an internal 15 kΩ pull-up resistor to V_CC.
[4] Pin I/OUC has an internal 11 kΩ pull-up resistor to V_DD(INTF).
Table 19. Sequencer and clock counter
V_DD = 3.3 V; V_DD(INTF) = 1.5 V; f_CLKIN = 10 MHz; GND = 0 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
t_act
activation time
total sequence
-
-
t_deact
deactivation time
total sequence
60 80
Max Unit
135 µs
100 µs
Table 20. Interface signals to host controller
V_DD = 3.3 V; V_DD(INTF) = 1.5 V; f_CLKIN = 10 MHz; GND = 0 V; T_amb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ Max
Data line: pin I/OUC^[1]
V_OL
LOW-level output voltage
I_OL = 1 mA
V_OH
HIGH-level output voltage
no DC load
I_OH < −10 µA
V_IL
LOW-level input voltage
V_IH
HIGH-level input voltage
I_IL
LOW-level input current
V_IL = 0 V
I_LIH
HIGH-level input leakage
V_IH = V_DD(INTF)
current
0
-
0.9V_DD(INTF) -
0.75V_DD(INTF) -
−0.3
-
0.7V_DD(INTF) -
-
-
-
-
0.3
V_DD(INTF) + 0.2
V_DD(INTF) + 0.2
0.25V_DD(INTF)
V_DD(INTF) + 0.3
600
10
Unit
V
V
V
V
V
µA
µA
TDA8023_1
Product data sheet
Rev. 01 — 16 July 2007
© NXP B.V. 2007. All rights reserved.
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