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TDA8035HN Datasheet, PDF (21/32 Pages) NXP Semiconductors – Smart card interface externally by a resistor bridge
NXP Semiconductors
TDA8035HN
Smart card interface
Table 7. Characteristics of IC …continued
VDDP = 3.3 V; VDD(INTF) = 3.3 V; fXtal = 10 MHz; GND = 0 V; Tamb=25 °C; unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
VOH
HIGH level output voltage No DC load
IOH ≤ 40 μA; VDDI>2V
IOH ≤ 20 μA; VDDI<2V
VIL
LOW-level input voltage
0.9
-
VDD(INTF)
0.75
-
VDD(INTF)
0.75
-
VDD(INTF)
−0.3
-
VIH
HIGH-level input voltage
Vhys
hysteresis voltage
on I/Ouc
ILH
HIGH-level input leakage VIH = VDDI
current
IIL
Rpu
tr(i), tf(i)
tr(o), tf(o)
LOW-level input current
pull-up resistance
input rise & fall times
output rise & fall times
Ipu
pull up current
Internal oscillator
VIL = 0
connected to VDD(INTF)
from VIL max to VIH min
CL ≤ 30 pF; 10 % to 90 %
from 0 to VDD(INTF)
VOH = 0.9 VDD, C = 30 pF
fosc(int)
internal oscillator
frequency
inactive state : osc(int)_Low
active state : osc(int)_High
Reset output to the card (RST)
Vo
output voltage
inactive mode; no load
inactive mode; Io= 1 mA
Io
output current
inactive mode &
at grounded pin RST
td
between RSTIn and RST RST enabled
VOL
LOW level output voltage IOL= 200 μA ,VCC = +5 V
IOL= 200 μA ,VCC = +3 V or
1.8 V
IOL = 20 mA (current limit)
VOH
HIGH level output voltage IOH = −200 μA
IOH = −20 mA (current limit)
tr, tf
rise and fall time
CL = 100 pF
VCC = +5 V and +3 V
tr, tf
rise and fall time
CL = 100 pF
VCC = +18 V
Clock output to the card (CLK)
Vo
output voltage
inactive mode; no load
inactive mode; Io = 1 mA
0.7
VDD(INTF)
0.05
-
VDD(INTF)
8k
10k
-
-
-
-
−1
-
230
315
2.0
2.5
0
-
0
-
-
-
-
-
0
-
0
-
VCC − 0.4 -
0.9 VCC -
0
-
-
-
-
-
0
-
0
-
Max
Unit
VDD(INTF) V
+ 0.1
VDD(INTF) V
+ 0.1
VDD(INTF) V
+ 0.1
0.3
V
VDD(INTF)
VDD(INTF) V
+ 0.3
0.25
V
VDD(INTF)
10
μA
600
μA
12k
Ω
1.2
μs
0.1
μs
-
mA
430
kHz
3.0
MHz
0.1
V
0.3
V
−1
mA
200
ns
0.3
V
0.2
V
VCC
V
VCC
V
0.4
V
0.1
us
0.2
us
0.1
V
0.3
V
TDA8035HN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 19 April 2011
© NXP B.V. 2011. All rights reserved.
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