TDA8035HN Datasheet, PDF (10/32 Pages) NXP Semiconductors – Smart card interface externally by a resistor bridge

NXP Semiconductors
8.3 Clock circuitry
TDA8035HN
Smart card interface
DIGITAL
Enclkin
clkxtal
MUX
XTAL
001aan750
Fig 6. Switch external clock
To generate the card clock CLK, the TDA8035 can either use an external clock provided
on XTAL1 pin or a crystal oscillator connected on both XTAL1 and XTAL2 pins. The
TDA8035 automatically detects if an external clock is provided on XTAL1. So, there is no
need of an extra pin to configure the clock source (external clock or crystal).
The automatic clock source detection is performed on each activation command
(CMDVCCN pin falling edge). During a time window defined by the internal oscillator, the
presence of an external clock on XTAL1 pin is checked. If a clock is detected, the crystal
oscillator is kept stopped, else, the crystal oscillator is started. It is mandatory when an
external clock is used, that the clock is applied on XTAL1 before CMDVCCN falling edge
signal.
The frequency may be chosen as f_XTAL, f_XTAL/2, f_XTAL/4 or f_XTAL/8 via the pins CLKDIV1 and
CLKDIV2. (Both selection inputs shall not be changed simultaneously: 10 ns minimum are
required between changes on CLKDIV1/CLKDIV2).
The frequency change is synchronous, which means that during transition, no pulse is
shorter than 45 % of the smallest period and that the first and last clock pulse around the
change has the correct width. When changing dynamically the frequency, the change is
effective only 10 periods of XTAL1 after the command.
The duty cycle on pin CLK shall be between 45 % and 55 % :
• When an external clock is used on XTAL1 pin , it should have a duty cycle of 48
% to 52 % when f_XTAL is used and rise and fall times shall respect values mentioned
on table 7 t_r(i), t_f(i). It has to connect a 56 pF serial capacitor .
• CLK frequency is f_XTAL,f_XTAL/2, f_XTAL/4 or f_XTAL/8 :
It is guaranteed between 45 % and 55 % of the period by the frequency dividers.
Table 4. Clock configuration
CLKDIV1
0
0
1
1
CLKDIV2
0
1
1
0
CLK
f_XTAL/8
f_XTAL/4
f_XTAL/2
f_XTAL
TDA8035HN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 19 April 2011
© NXP B.V. 2011. All rights reserved.
10 of 32