TDA8035HN Datasheet, PDF (14/32 Pages) NXP Semiconductors – Smart card interface externally by a resistor bridge

NXP Semiconductors
TDA8035HN
Smart card interface
8.8 Deactivation sequence
When a session is completed, the micro-controller sets the CMDVCCN line to the HIGH
state. The circuit then executes an automatic deactivation sequence by counting the
sequencer back and ends in the inactive state (see Figure 9):
1. RST goes LOW (t₁₁ = t₁₀ + 3T/64)
2. CLK is stopped LOW (t₁₂ = t₁₁ +T/2)
3. I/O, AUX1 and AUX2 are pulled LOW (t₁₃ = t₁₁ + T)
4. V_CC falls to zero (t₁₄ = t₁₁ + 3T/2) (The deactivation sequence is completed when V_CC
reaches its inactive state)
5. VUP falls to zero (t₁₅ = t₁₁ + 7T/2)
6. V_CC < 0.4 V (t_de = t₁₁ + 3T/2 + Vcc fall time)
7. All card contacts become low-impedance to GND (I/OUC, AUX1UC and AUX2UC
remain pulled up to V_DD(INTF) via a 10 kΩ resistor).
8. The internal oscillator goes back to its lower frequency.
CMDVCCN
RST
CLK
I/O
VCC
VUP
Xtal1
Oscint
high frequency
t10
t11 t12 t13 t14
Fig 9. Deactivation sequence
low frequency
T/2
t15
001aan753
8.9 VCC regulator
V_CC buffer is able to continuously deliver up to 65mA at Vcc = 5 V, 65 mA at Vcc = 3 V,
35 mA at Vcc =1.8 V .
It has an internal overload detection at approximately 125 mA.
This detection is internally filtered, allowing spurious current pulses of some ms up to
200 mA to be drawn by the card without causing a deactivation. (The average current
value must stay below maximum).
TDA8035HN
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.0 — 19 April 2011
© NXP B.V. 2011. All rights reserved.
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