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| NP5Q128A13ESFC0E Datasheet, PDF (50/56 Pages) Numonyx B.V – 128-Mbit, Quad/Dual/Single Serial Interface, 128-Kbyte Sectors Phase Change Memory (PCM) with 66MHz SPI Bus Interface | |||
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DC and AC parameters
Numonyx® Omneo⢠P5Q Datasheet
Table 15.
AC characteristics(1) (continued)
Test conditions specified in Table 10 and Table 12
Symbol Alt.
Parameter
Min
Typ(2)
Max Unit
tW
tPP(7)
Write status register cycle time
Page program cycle time (64 bytes)
(Legacy Program & Bit-alterable Write)
Page program cycle time (64 bytes)
(Program on all 1s)
200
350 µs
120
360
µs
71
280
tSE
Sector erase cycle time
400
800 ms
tBE
Bulk erase cycle time
50
100 s
1. Preliminary data.
2. Typical values given for TA = 25° C @ nominal VCC.
3. tCH + tCL must be greater than or equal to 1/ fC.
4. Value guaranteed by characterization, not 100% tested in production.
5. Expressed as a slew-rate.
6. Only applicable as a constraint for a WRSR instruction when SRWD is set to â1â.
7. When using the page program (PP) instruction to program consecutive bytes, optimized timings are obtained with one
sequence including all the bytes versus several sequences of only a few bytes (1 ⤠n ⤠64).
Figure 22. Serial input timing
S
tCHSL
C
tDVCH
DQ0
tSLCH
tCHDX
MSB IN
tSHSL
tCHSH
tSHCH
tCLCH
LSB IN
tCHCL
DQ1
High Impedance
AI13728
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