NP5Q128A13ESFC0E Datasheet, PDF (19/56 Pages) Numonyx B.V – 128-Mbit, Quad/Dual/Single Serial Interface, 128-Kbyte Sectors Phase Change Memory (PCM) with 66MHz SPI Bus Interface

Numonyx® Omneo™ P5Q Datasheet
5
Memory organization
Memory organization
The memory is organized as:
– 16,772,216 bytes (8 bits each)
– 8 Super Page programming regions (16 sectors each)
– 128 sectors (128 Kbytes each)
– 262,144 pages (64 bytes each)
Each page can be individually programmed (bits are programmed from ‘1’ to ‘0’) or written
(bit alterable: ‘1’ can be altered to ‘0’ and ‘0’ can be altered to ‘1’). The device is sector or
bulk erasable (bits are erased from ‘0’ to ‘1’).
Table 2.
Sector
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
Memory organization
Address range
FE0000
FC0000
FA0000
F80000
F60000
F40000
F20000
F00000
EE0000
EC0000
EA0000
E80000
E60000
E40000
E20000
E00000
DE0000
DC0000
DA0000
D80000
D60000
D40000
D20000
D00000
CE0000
FFFFFF
FDFFFF
FBFFFF
F9FFFF
F7FFFF
F5FFFF
F3FFFF
F1FFFF
EFFFFF
EDFFFF
EBFFFF
E9FFFF
E7FFFF
E5FFFF
E3FFFF
E1FFFF
DFFFFF
DDFFFF
DBFFFF
D9FFFF
D7FFFF
D5FFFF
D3FFFF
D1FFFF
CFFFFF
Sector
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
Address range
CC0000
CA0000
C80000
C60000
C40000
C20000
C00000
BE0000
BC0000
BA0000
B80000
B60000
B40000
B20000
B00000
AE0000
AC0000
AA0000
A80000
A60000
A40000
A20000
A00000
9E0000
9C0000
CDFFFF
CBFFFF
C9FFFF
C7FFFF
C5FFFF
C3FFFF
C1FFFF
BFFFFF
BDFFFF
BBFFFF
B9FFFF
B7FFFF
B5FFFF
B3FFFF
B1FFFF
AFFFFF
ADFFFF
ABFFFF
A9FFFF
A7FFFF
A5FFFF
A3FFFF
A1FFFF
9FFFFF
9DFFFF
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