NS486SXF Datasheet, PDF (9/44 Pages) National Semiconductor (TI) – NS486TMSXF Optimized 32-Bit 486-Class Controller with On-Chip Peripherals for Embedded Systems

2 0 Pin Description Tables
FIGURE 2-1 NS486SXF Package Pinout Diagram
TL EE 12514 – 4
The NS486SXF single chip controller is provided in a com-
pact 160-pin industry standard JEDEC PQFP package The
following tables detail the Symbol Type and Description of
each pin The tables divide the pins into functional groups
as follows Bus Interface Unit Pins DMA Control Pins
DRAM Control Pins Power Pins Reset Logic Pins Auxiliary
Processor Interface Pins Test Pins Interrupt Control Pins
Real Time Clock Pins LCD Interface Pins Oscillator Pins
UART IrDA Pins PCMCIA Pins IEEE-1284 Port (ECP
Mode) Pins Timer Pins 3-Wire Serial I O Pins General Pur-
pose Chip Select Pins and Reconfigurable I O Pins Twen-
ty-nine I O pins are multipurpose In their standard modes
they perform specific I O controller functions When those
particular I O functions are not required in the system how-
ever those pins can be reprogrammed to become general
purpose bidirectional I O lines
Note In the above figure and in the following tables all active low signals
are shown with an overbar
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