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NS486SXF Datasheet, PDF (16/44 Pages) National Semiconductor (TI) – NS486TMSXF Optimized 32-Bit 486-Class Controller with On-Chip Peripherals for Embedded Systems
2 0 Pin Description Tables (Continued)
TABLE 2-16 3-Wire Serial I O Pins
Symbol Pins Type
Function
SO DCD 41
I O This pin has two possible programmable options controlled by the Modem Signal Control Register
(refer to the UART section)
1 The Serial data Output signal for MICROWIRE
2 Data Carrier Detect When low this input signal indicates that the data carrier has been detected by
the MODEM or data set The DCD signal is a MODEM status input whose condition can be tested by
the CPU reading bit 7 (DCD) of the MODEM Status Register Bit 7 is the complement of the DCD
signal Bit 3 (DDCD) of the MODEM Status Register indicates whether the DCD input has changed
state since the previous reading of the MODEM Status Register DCD has no effect on the receiver
Note Whenever the DCD bit of the MODEM Status Register changes state an interrupt is generated if the MODEM Status
Interrupt is enabled
SI CTS
42 I O This pin has two possible programmable options controlled by the Modem Signal Control Register
(refer to the UART section)
1 The Serial data Input signal for MICROWIRE or the serial data I O for Access bus
2 Clear To Send When low this input signal indicates that the MODEM or data set is ready to
exchange data The CTS signal is a MODEM status input whose conditions can be tested by the
CPU reading bit 4 (CTS) of the MODEM Status Register Bit 4 is the complement of the CTS signal
Bit 0 (DCTS) of the MODEM Status Register indicates whether the CTS input has changed state
since the previous reading of the MODEM Status Register CTS has no effect on the Transmitter
Note Whenever the CTS bit of the MODEM Status Register changes state an interrupt is generated if the MODEM Status
Interrupt is enabled
SCLK RI 43
I O This pin has two possible programmable options controlled by the Modem Signal Control Register
(refer to the UART section)
O 1 The Serial CLocK signal for MICROWIRE and Access bus
I 2 Ring Indicator When low this input signal indicates that a telephone ringing signal has been
received by the MODEM or data set The RI signal is a MODEM status input whose condition can be
tested by the CPU reading bit 6 (RI) of the MODEM Status Register Bit 6 is the complement of the RI
signal Bit 2 (TERI) of the MODEM Status Register indicates whether the RI input signal has
changed from a low to high state since the previous reading of the MODEM Status Register
Note Whenever the CTS bit of the MODEM Status Register changes state an interrupt is generated if the MODEM Status Interrupt
is enabled
Note Whenever the RI bit of the MODEM Status Register changes from a high to a low state an interrupt is generated if the
MODEM Status Interrupt is enabled
Note For MICROWIRE Slave Mode a pin must be selected to be the Chip Select Input
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