NS486SXF Datasheet, PDF (29/44 Pages) National Semiconductor (TI) – NS486TMSXF Optimized 32-Bit 486-Class Controller with On-Chip Peripherals for Embedded Systems

3 0 Device Specifications (Continued)
TABLE 3-5 No Command Delay ISA-like Bus Specifications
Symbol
Parameter
Formula
Min
Max
t_AHCD
t_ASCD
t_CDPW
t_CHCD
t_CSCD
t_DOFF
t_RCAT
t_RCDH
t_WCDH
t_WCVD
t_WCS
Address Hold Time from CMD
Address Setup TIme to CMD
Command Pulse Width
Chip Select Hold Time from CMD
Chip Select Setup Time to CMD
Read Data TRI-STATE
Read CMD Data Access TIme
Read CMD Data Hold TIme
Write CMD Data Hold Time
Write CMD to Valid Data
Write Command Setup Time
1 0T a
1 0T a
1 0T a (Wait)T a
1 0T a
1 0T a
1 0T a
1 0T a (Wait)T a
1 0T a
0 5T a
b20
b20
b10
b25
b40
0
b25
b20
b25
b30
5
Note The value of (Wait) in the above formulae is the number of programmed wait states associated with that access cycle (default value is 7 but may be
programmed to 0–7)
TABLE 3-6 One Programmed Command Delay ISA-like Bus Specifications
Symbol
Parameter
Formula
Min
Max
t_AHCD
t_ASCD
t_CDPW
t_CHCD
t_CSCD
t_DOFF
t_RCAT
t_RCDH
t_WCDH
t_WCVD
t_WCS
Address Hold Time from CMD
Address Setup TIme to CMD
Command Pulse Width
Chip Select Hold Time from CMD
Chip Select Setup Time to CMD
Read Data TRI-STATE
Read CMD Data Access TIme
Read CMD Data Hold TIme
Write CMD Data Hold Time
Write Valid Data to CMD (Note 2)
Write Command Setup Time
1 0T a
2 0T a
1 0T a (Wait)T a
1 0T a
2 0T a
1 0T a
1 0T a (Wait)T a
1 0T a
1 0T a
0 5T a
b20
b20
b10
b25
b40
0
b25
b5
b20
b25
b30
Note 1 The value of (Wait) in the above formulae is the number of programmed wait states associated with that access cycle (default value is 7 but may be
programmed to 0–7)
Note 2 For this case Valid Write Data Sets-up to the leading edge of the Command Strobe
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