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NS486SXF Datasheet, PDF (15/44 Pages) National Semiconductor (TI) – NS486TMSXF Optimized 32-Bit 486-Class Controller with On-Chip Peripherals for Embedded Systems
2 0 Pin Description Tables (Continued)
TABLE 2-14 IEEE-1284 Port (ECP Mode)
Symbol
PD 7 0
SLIN
STB
AFD
INIT
ACK
PE
SLCT
ERR
BUSY
Pins
81 82
83 85
86 88
89 90
91
92
93
94
95
96
97
99
100
Type
OI
OI
OI
OI
OI
IO
IO
IO
IO
IO
Function
Parallel Data Bi-directional data pins transfer data and address information to and from the parallel
port
SeLect INput Used in a closed-loop handshake with BUSY to transfer data or address information
from the host to the peripheral Host driven
data STroBe Driven high by the host while in ECP Mode Asserted low by host to terminate ECP Mode
and return link to Compatibility Mode Host driven
Automatic FeeD The host asserts this line low for flow control in the reverse direction It is used in a
interlocked handshake with ACK Provides command information in the forward direction Host driven
Active low
INITialize When this signal is asserted low to place the data channel in the reverse direction the
peripheral is allowed to drive the data bus Host driven Active low
ACKnowledge Used in closed-loop handshake with AFD to transfer data to the host Peripheral
device drive Active low
Peripheral Error Asserted low to acknowledge INIT reverse request Peripheral device drive
SeLeCT Asserted high when selected or indicating an affirmative response for each respective
extensibility byte Peripheral device drive Active high
ERROR This input is asserted low by the peripheral to request host communications Valid only in the
forward direction Peripheral device drive Active low
BUSY This is asserted low by the peripheral for flow control in the forward direction de-asserted to
acknowledge transfer of data or address completion Peripheral device drive Active low
TABLE 2-15 Timer Pins
Symbol
T0
T1
Pins
55
56
Type
IO
IO
Function
Programmable Timer pin 0 This Bidirectional pin may be selected to control one of the following four
functions via bits 1-0 of the Timer I O Control Register
1 The GATE input into Timer 0
2 The GATE input into Timer 1
3 The OUT output from Timer 0
4 The CLK input into Timer 1
Programmable Timer pin 1 This Bidirectional pin may be selected to control one of the following four
functions via bits 3-2 of the Timer I O Control Register
1 The GATE input into Timer 0
2 The GATE input into Timer 1
3 The OUT output from Timer 1
4 The CLK input into Timer 0
15
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