CS4103 Datasheet, PDF (3/24 Pages) National Semiconductor (TI) – IEEE P1394a Physical Layer Device

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1.0 Architectural Overview
The Geode CS4301 can be described as providing the
functional blocks as shown in Figure 1-1 and described in
the following subsections.
1.1 LINK INTERFACE
The Link Interface implements the PHY-Link Interface as
specified in clause 5, revision 2.0 of the P1394a specifica-
tion. It handles both differentiated and undifferentiated
modes of operation. It decodes LREQ requests and com-
municates with the Arbiter and Register Set for bus
requests and register read/write commands, respectively.
In addition to receiving LREQ requests, the Link Interface
handles the bidirectional control and data buses for packet
transmission and reception as well as register reads. The
Link Interface uses the Link Power Status input (LPS) sig-
nal to determine the operational state of the Geode
CS4210 OHCI Controller and for resetting, disabling, and/
or restoring the PHY-Link Interface. The Link Interface also
controls the Link-On output (LNKON), used to signal the
CS4210 when the PHY-Link Interface is not active.
SCLK LPS LNKON LREQ
DATA[0:7]
CTRL[0:1]
DIRECT
PLL
Register
Set
Link Interface
Packet
Processor
Port State
Arbiter
Receiver
Transmitter
Revision 1.0
Transceiver
Transceiver
Transceiver
Figure 1-1. Functional Block Diagram
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