CS4103 Datasheet, PDF (24/24 Pages) National Semiconductor (TI) – IEEE P1394a Physical Layer Device

5.0 Physcial Dimensions
Note: 1 Standard lead finish: 7.62 micrometers minimum plating (8/15) thickness on copper.
2 Dimension does not include mold protrusion. Maximum allowable mold protrusion 0.25 mm per side.
3. Reference JEDEC registration MS-026, variation BDD, dated February 1999.
Figure 5-1. 80-Pin Low-Profile Quad Flat Pack (LQFP)
Order Number: CS4103VHG
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