SM8211M Datasheet, PDF (5/22 Pages) Nippon Precision Circuits Inc – POCSAG Decoder For Pagers

SM8211M
FUNCTIONAL DESCRIPTION
Receive Format
The receive format conforms to CCIR RPC No. 1
(POCSAG).
Preamble
1st batch
2nd and
successive
batches
Continuous 576-bit "1,0" bit pattern
... 1 0 1 0 1 0 1 0 1 0 ...
SC
Sync code word
Frame number
1 frame (= 2 code words)
SC
0
1
2
3
4
5
6
SC
7
1 code word (32 bits)
Figure 1. Receive signal format
Sync signal (SC)
The sync signal is a continuous code word in the
received signal, used for word synchronization. It
comprises 31 bits in an M-series bit pattern plus one
even-parity bit, making a 32-bit signal. The sync
code word pattern is shown in table 1.
Table 1. Sync code word
Bit number
1
2
3
4
5
6
7
8
Bit value
0
1
1
1
1
1
0
0
Bit number
9
10
11
12
13
14
15
16
Bit value
1
1
0
1
0
0
1
0
Bit number
17
18
19
20
21
22
23
24
Bit value
0
0
0
1
0
1
0
1
Bit number
25
26
27
28
29
30
31
32
Bit value
1
1
0
1
1
0
0
0
NIPPON PRECISION CIRCUITS—5