SM8211M Datasheet, PDF (13/22 Pages) Nippon Precision Circuits Inc – POCSAG Decoder For Pagers

SM8211M
Table 5. Flag functions
Flag
SS
S0, S1
LBO
FF0 to FF2
INV
BS2
PL0 to PL5
RF0 to RF5
FL2
FL0, FL1
ER0 to ER2
Function
Receive mode set ON/OFF. ON when 1.
One of eight operating conditions select (with LBO when SS is 1)
512/1200 bps speed select. 512 bps when 1.
Frame number select
Signal input (SIG-IN) normal/inverse select. Normal when 0.
BS2 output signal mode select
BS3 output signal rising-edge setup time for receive timing
BS1 output signal rising-edge setup time for receive timing
Internal digital filter ON/OFF. ON when 1.
Digital filter parameter select (when FL2 is 1)
Rate error detection threshold select
Table 6. Receive mode set flags¹
Set flags
SS S1 S0 LBO
PL5 PL4 PL3 PL2 PL1 PL0 RF5 RF4 RF3 RF2 RF1 RF0 FL2 FL1 FL0 ER2 ER1 ER0
1000111101001010101001
1010111101001100101001
1100111101001110101001
1110111101010001000001
1001011011000100101001
1011011011000101101001
1101011011000110101001
1111011011000111000001
0××0
0××1
All other combinations not set automatically
1. × = don’t care
Table 7. Baud rate flag
LBO
0
1
Baud rate
1200 bps
512 bps
Table 9. BS2 flag
BS2
0
1
BS2 operating mode
See the description in
section “Battery Saving
(BS1, BS2, BS3)”
Table 8. Input polarity flag
INV
0
1
Polarity
Normal
Inverse
NIPPON PRECISION CIRCUITS—13