SM8211M Datasheet, PDF (19/22 Pages) Nippon Precision Circuits Inc – POCSAG Decoder For Pagers

FLOWCHARTS
SM8211M
Switch ON
Preamble
Idle
No
RST = LOW
Yes
BS1 = BS3 = LOW
No
RST = HIGH
Yes
BS1 = BS3 = LOW
TX-CLK count reset (T = 0)
TX-CLK increment (T = T + 1)
ID code and flags read in
No
T = 225
Yes
ID code and flags set
BS3 = HIGH
BS1 = BS2 = HIGH
(BS1 = HIGH)
BS2 = LOW
(BS2 = HIGH)
Bit clock counter reset (T = 0)
Bit clock count increment
(T = T + 1)
Yes
Preamble pattern
No
Yes
Sync code detected
No
Yes
Rate error
No
No
T = 544
BS1 = BS3 = LOW
(BS1 = BS2 = BS3 = LOW)
No
BS3 output timing
Yes
BS3 = HIGH
BS1 = BS2 = HIGH
(BS1 = HIGH)
BS2 = LOW
(BS2 = HIGH)
Yes
Just transferred from
lock mode
No
Yes
Preamble present
No
No
Receive timing finished
Yes
BS1 = BS3 = LOW
(BS1 = BS2 = BS3 = LOW)
No
Sync code detected
Yes
Preamble
SYN-VAL = HIGH
Idle
Lock
Preamble
Parentheses indicate operation with flag BS2 = 1.
NIPPON PRECISION CIRCUITS—19