UPD703111A Datasheet, PDF (912/974 Pages) NEC – 32-Bit Single-Chip Microcontroller

CHAPTER 17 ELECTRICAL SPECIFICATIONS
(5) Page ROM access timing (1/2)
Parameter
WAIT setup time (to BUSCLK↑)
WAIT hold time (from BUSCLK↑)
Data input setup time
(to BUSCLK↑)
Data input hold time
(from BUSCLK↑)
Off-page data input setup time
(to address)
Off-page data input setup time
(to RD)
Data input hold time (from RD↑)
Delay time from RD↑ to data
output
On-page data input setup time
(to address)
Symbol
<19> tSWK
<20> tHKW
<21> tSKID
<22> tHKID
<25> tSAID
<26> tSRDID
<31>
<32>
tHRDID
tDRDOD
<50> tSOAID
Conditions
MIN.
6
2
6
2
2
(0.5 + i) T − 6
MAX.
Unit
ns
ns
ns
ns
(2 + w + wD + wAS) T − 17 ns
(1.5 + w + wD) T − 17
ns
ns
ns
(2 + w + wPR) T − 17
ns
Remarks 1. T = tCYK
2. w: Number of waits inserted due to WAIT
3. wD: Number of waits inserted by DWC0 and DWC1 registers
4. wPR: Number of waits inserted by PRC register
5. i: Number of idle states inserted when a write cycle is inserted after a read cycle
6. wAS: Number of address setup waits inserted by ASC register
7. Observe at least one of the data input hold times tHRDID and tHKID.
8. For the number of w and wD to be inserted, refer to 4.7.3 Relationship between programmable wait
and external wait.
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User’s Manual U16031EJ4V1UD