UPD703111A Datasheet, PDF (244/974 Pages) NEC – 32-Bit Single-Chip Microcontroller

CHAPTER 5 MEMORY ACCESS CONTROL FUNCTION
15 14 13 12 11 10 9 8 7
RFS1 REN1 0 0 0 0 0 RCC11RCC10 0
654 3210
Address After reset
0 RIN15 RIN14 RIN13 RIN12 RIN11 RIN10 FFFFF4A6H 0000H
RFS3 REN3 0 0 0 0 0 RCC31RCC30 0 0 RIN35 RIN34 RIN33 RIN32 RIN31 RIN30 FFFFF4AEH 0000H
RFS4 REN4 0 0 0 0 0 RCC41RCC40 0 0 RIN45 RIN44 RIN43 RIN42 RIN41 RIN40 FFFFF4B2H 0000H
RFS6 REN6 0 0 0 0 0 RCC61RCC60 0 0 RIN65 RIN64 RIN63 RIN62 RIN61 RIN60 FFFFF4BAH 0000H
Bit position
15
Bit name
RENn
9, 8
RCCn1,
RCCn0
Function
Specifies whether CBR (auto) refresh is enabled or disabled.
0: Refresh disabled
1: Refresh enabled
Specifies the refresh count clock (TRCY).
RCCn1 RCCn0
Refresh count clock (TRCY)
0
0
32/BUSCLK
0
1
128/BUSCLK
1
0
256/BUSCLK
1
1
Setting prohibited
5 to 0
RINn5 to
RINn0
Sets the interval factor of the interval timer for the generation of the refresh timing.
RINn5 RINn4 RINn3 RINn2 RINn1 RINn0
Interval factor
0
0
0
0
0
0
1
0
0
0
0
0
1
2
0
0
0
0
1
0
3
0
0
0
0
1
1
4
:
:
:
:
:
:
:
1
1
1
1
1
1
64
Remark n = 1, 3, 4, 6
244
User’s Manual U16031EJ4V1UD