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UPD784020 Datasheet, PDF (66/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCOMPUTER
mPD784020, 784021
(1) Read/write operation (2/2)
Parameter
Data setup time
(referred to WR•)
Data hold time
(referred to WR•)Note
WR• Æ ASTB• delay time
WR low-level width
Symbol
Conditions
tSODW VDD = +5.0 V ±10 %
tHWOD VDD = +5.0 V ±10 %
tDWST
tWWL
VDD = +5.0 V ±10 %
Min.
Max.
Unit
(1.5 + n) T – 30
ns
(1.5 + n) T – 40
ns
0.5T – 5
ns
0.5T – 14
ns
0.5T – 9
ns
(1.5 + n) T – 30
ns
(1.5 + n) T – 40
ns
Note The hold time includes the time for holding VOH1 and VOL1 on the load conditions of CL = 50 pF and RL =
4.7 kW.
Remark T: TCYK (system clock cycle time)
n: number of wait cycles (n • 0)
(2) Bus hold timing
Parameter
Symbol
Conditions
HLDRQ• Æ float delay time tFHQC
HLDRQ• Æ HLDAK• delay time tDHQHHAH VDD = +5.0 V ±10 %
Float Æ HLDAK• delay time
HLDRQØ Æ HLDAKØ delay time
tDCFHA
tDHQLHAL VDD = +5.0 V ±10 %
HLDAKØ Æ active delay time tDHAC VDD = +5.0 V ±10 %
Remark T: TCYK (system clock cycle time)
a: 1 when address wait is applied, 0 in other cases
n: number of wait cycles (n • 0)
Min.
1T – 20
1T – 30
Max.
Unit
(6 + a + n) T + 50 ns
(7 + a + n) T + 30 ns
(7 + a + n) T + 40 ns
1T + 30
ns
2T + 40
ns
2T + 60
ns
ns
ns
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