UPD784020 Datasheet, PDF (54/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCOMPUTER

mPD784020, 784021
13. INSTRUCTION SET
(1) 8-bit instructions (The instructions enclosed in parentheses are implemented by a combination of
operands, where A is described as r.)
MOV, XCH, ADD, ADDC, SUB, SUBC, AND, OR, XOR, CMP, MULU, DIVUW, INC, DEC, ROR, ROL, RORC,
ROLC, SHR, SHL, ROR4, ROL4, DBNZ, PUSH, POP, MOVM, XCHM, CMPME, CMPMNE, CMPMNC, CMPMC,
MOVBK, XCHBK, CMPBKE, CMPBKNE, CMPBKNC, CMPBKC, CHKL, CHKLA
Table 13-1 Instructions Implemented by 8-Bit Addressing
2nd operand #byte
A
1st operand
r
saddr
sfr
!addr16 mem
r3
[WHL+]
n
None^{Note 2}
r'
saddr'
!!addr24 [saddrp] PSWL [WHL–]
[%saddrg] PSWH
A
(MOV) (MOV) MOV
(MOV)^{Note 6} MOV
(MOV) MOV
MOV
(MOV)
ADD^{Note 1} (XCH)
XCH
(XCH)^{Note 6} (XCH) (XCH)
XCH
(XCH)
(ADD)^{Note 1} (ADD)^{Note 1} (ADD)^{Notes 1, 6} (ADD)^{Note 1} ADD^{Note 1} ADD^{Note 1}
(ADD)^{Note 1}
r
MOV
(MOV) MOV
MOV
MOV
MOV
ADD^{Note 1} (XCH)
XCH
XCH
XCH
XCH
(ADD)^{Note 1} ADD^{Note 1} ADD^{Note 1} ADD^{Note 1}
ROR^{Note 3} MULU
DIVUW
INC
DEC
saddr
MOV
(MOV)^{Note 6} MOV
MOV
ADD^{Note 1} (ADD)^{Note 1} ADD^{Note 1} XCH
ADD^{Note 1}
INC
DEC
DBNZ
sfr
MOV
MOV
MOV
ADD^{Note 1} (ADD)^{Note 1} ADD^{Note 1}
PUSH
POP
CHKL
CHKLA
!addr16
!!addr24
MOV
(MOV) MOV
ADD^{Note 1}
mem
[saddrp]
[%saddrg]
MOV
ADD^{Note 1}
mem3
ROR4
ROL4
r3
PSWL
PSWH
MOV
MOV
B, C
DBNZ
STBC, WDM
MOV
[TDE+]
[TDE–]
(MOV)
(ADD)^{Note 1}
MOVM^{Note 4}
MOVBK^{Note 5}
Notes 1. ADDC, SUB, SUBC, AND, OR, XOR, and CMP are the same as ADD.
2. There is no second operand, or the second operand is not an operand address.
3. ROL, RORC, ROLC, SHR, and SHL are the same as ROR.
4. XCHM, CMPME, CMPMNE, CMPMNC, and CMPMC are the same as MOVM.
5. XCHBK, CMPBKE, CMPBKNE, CMPBKNC, and CMPBKC are the same as MOVBK.
6. When saddr is saddr2 with this combination, an instruction with a short code exists.
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