UPD784020 Datasheet, PDF (39/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCOMPUTER

mPD784020, 784021
(2) Three-wire serial I/O mode
In this mode, the master device makes the serial clock active to start transmission, then transfers 1-byte data
in phase with the clock.
This mode is designed for communication with a device incorporating a conventional synchronous serial interface.
Basically, three lines are used for communication: the serial clock line (SCK) and the two serial data lines (SI
and SO).
In general, a handshake line is required to check the state of communication.
Fig. 8-11 Block Diagram of Three-Wire Serial I/O Mode
Internal bus
SI1, SI2
Direction control
circuit
SIO1, SIO2
Shift register
Output latch
SO1, SO2
SCK1, SCK2
Serial clock counter
Serial clock
control circuit
Interrupt signal
generator
INTCSI1,
INTCSI2
1/m
1/2ⁿ⁺¹
fXX/2
Remark fXX: Oscillator frequency or external clock input
n = 0 to 11
m = 1, 16 to 30
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