UPD784020 Datasheet, PDF (43/90 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCOMPUTER

mPD784020, 784021
9. INTERRUPT FUNCTION
Table 9-1 lists the interrupt request handling modes. These modes are selected by software.
Table 9-1 Interrupt Request Handling Modes
Handling mode Handled by
Handling
Vectored interrupt Software
Branches to a handling routine for execution
(arbitrary handling).
Context switching
Automatically selects a register bank, and
branches to a handling routine for execution
(arbitrary handling).
Macro service
Firmware
Performs operations such as memory-to-I/O-
device data transfer (fixed handling).
PC and PSW contents
The PC and PSW contents are pushed
to and popped from the stack.
The PC and PSW contents are saved to
and read from a fixed area in the
register bank.
Maintained
9.1 INTERRUPT SOURCE
An interrupt can be issued from any one of the interrupt sources listed in Table 9-2: execution of a BRK instruction,
an operand error, or any of the 23 other interrupt sources.
Four levels of interrupt handling priority can be set. Priority levels can be set to nest control during interrupt handling
or to concurrently generate interrupt requests. Nested macro services, however, are performed without suspension.
When interrupt requests having the same priority level are generated, they are handled according to the default
priority (fixed). (See Table 9-2.)
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