MC9S12B128_05 Datasheet, PDF (97/132 Pages) Motorola, Inc – Covers also preliminary MC9S12B64 using MC9S12B128 die

Device User Guide —9S12B128DGV1/D V01.13
A.2.4.2 3.3V Range
Table A-14 specifies the ATD conversion performance excluding any errors due to current injection,
input capacitance and source resistance.
Table A-14 ATD Conversion Performance In 3.3V Range
Conditions are shown in Table A-4 unless otherwise noted
V_REF = V_RH - V_RL = 3.328V. Resulting to one 8 bit count = 13mV and one 10 bit count = 3.25mV
f_ATDCLK = 2.0MHz
Supply Voltage 3.3V-10% <= V_DDA <= 3.3V+10%
Num C
Rating
Symbol Min
Typ
1 P 10-Bit Resolution
LSB
3.25
2 P 10-Bit Differential Nonlinearity
DNL
–1.5
3 P 10-Bit Integral Nonlinearity
INL
–3.5
±1.5
4 P _{10-Bit Absolute Error}¹
AE
-5
±2.5
5 P 8-Bit Resolution
LSB
13
6 P 8-Bit Differential Nonlinearity
DNL
–0.5
7 P 8-Bit Integral Nonlinearity
INL
–1.5
±1.0
8 P _{8-Bit Absolute Error}¹
AE
-2.0
±1.5
NOTES:
1. These values include the quantization error which is inherently 1/2 count for any A/D converter.
Max
1.5
3.5
5
0.5
1.5
2.0
Unit
mV
Counts
Counts
Counts
mV
Counts
Counts
Counts
A.2.4.3 ATD Accuracy Definitions
For the following definitions see also Figure A-1.
Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps.
DNL(i) = ^V-----i_1--^–--L---VS----ⁱ-B--^–---¹-- – 1
The Integral Non-Linearity (INL) is defined as the sum of all DNLs:
∑ INL(n) = n DNL(i) = V---1--n-L---–-S----V-B---0- – n
i=1
97