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MC9S12B128_05 Datasheet, PDF (106/132 Pages) Motorola, Inc – Covers also preliminary MC9S12B64 using MC9S12B128 die
Device User Guide — 9S12B128DGV1/D V01.13
Figure A-3 VREG_3V3 - Chip Power-up and Voltage Drops (not scaled)
V
VDDA
VLVID
VLVIA
VDD
VPORD
VLVRD
VLVRA
LVI
POR
LVR
t
LVI enabled
LVI disabled due to LVR
A.4.3 Output Loads
A.4.3.1 Resistive Loads
On-chip voltage regulator VREG_3V3 intended to supply the internal logic and oscillator circuits allows
no external DC loads.
A.4.3.2 Capacitive Loads
The capacitive loads are specified in Table A-18. Ceramic capacitors with X7R dielectricum are required.
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