MC9S12B128_05 Datasheet, PDF (22/132 Pages) Motorola, Inc – Covers also preliminary MC9S12B64 using MC9S12B128 die

Device User Guide — 9S12B128DGV1/D V01.13
– Digital filtering
– Programmable rising or falling edge trigger
• Memory
– 128K Flash EEPROM
– 1K byte EEPROM
– 4K byte RAM
• Analog-to-Digital Converter
– 16-channels for 112 Pin Package, 8 channels for 80 Pin package options
– 10-bit resolution
– External conversion trigger capability
• 1M bit per second, CAN 2.0 A, B software compatible module
– Five receive and three transmit buffers
– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
– Four separate interrupt channels for Rx, Tx, error and wake-up
– Low-pass filter wake-up function
– Loop-back for self test operation
• Input Capture/Output Compare Timer (TIM)
– 16-bit Counter with 7-bit Prescaler
– 8 programmable input capture or output compare channels
– 16-bit Pulse Accumulators
– Simple PWM Mode
– Modulo Reset of Timer Counter
– External Event Counting
– Gated Time Accumulation
• 8 PWM channels
– Programmable period and duty cycle
– 8-bit 8-channel or 16-bit 4-channel
– Separate control for each pulse width and duty cycle
– Center-aligned or left-aligned outputs
– Programmable clock select logic with a wide range of frequencies
– Fast emergency shutdown input
– Usable as interrupt inputs
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