MC68HC05X4 Datasheet, PDF (89/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Motorola CAN
Interface to the MC68HC05X4 CPU
f_osc
OSC1
Divide by
2
f_osc/2
Divide by
f_OP
10 or 2
Prescaler (P)
2P
t_SCL =
f_osc
MCAN module system clock
MCU bus clock
Figure 11. Oscillator block diagram
MCAN bus timing
register 1 (CBT1)
This register can only be accessed only when the RR bit in CCNTRL is
set.
Address: $0027
Bit 7
6
5
4
3
2
1
Bit 0
SAMP TSEG22 TSEG21 TSEG20 TSEG13 TSEG12 TSEG11 TSEG10
Reset:
Undefined
Figure 12. MCAN Bus Timing 1 (CBT1)
SAMP — Sampling
This bit determines the number of samples of the serial bus to be
taken per bit time. When set three samples per bit are taken. This
sample rate gives better rejection of noise on the bus, but introduces
a one bit delay to the bus sampling. For higher bit rates SAMP should
be cleared, which means that only one sample will be taken per bit.
1 = Three samples per bit.
0 = One sample per bit.
TSEG22 – TSEG10 — Time segment bits
Time segments within the bit time fix the number of clock cycles per
bit time, and the location of the sample point.
21-mcan
MOTOROLA
Motorola CAN
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MC68HC05X4 Rev 1.0
89