MC68HC05X4 Datasheet, PDF (86/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Motorola CAN
Freescale Semiconductor, Inc.
MCAN
acceptance code
register (CACC)
On reception each message is written into the current receive buffer.
The MCU is only signalled to read the message however, if it passes the
criteria in the acceptance code and acceptance mask registers
(accepted); otherwise, the message will be overwritten by the next
message (dropped).
NOTE: This register can be accessed only when the RR bit in CCNTRL is set.
Address: $0024
Bit 7
6
5
4
3
2
1
Bit 0
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
Reset:
Undefined
Figure 8. MCAN Acceptance Code (CACC)
AC7 – AC0 — Acceptance code bits
AC7 – AC0 comprise a user defined sequence of bits with which the
8 most significant bits of the data identifier (ID10 – ID3) are compared.
The result of this comparison is then masked with the acceptance
mask register. Once a message has passed the acceptance criterion
the respective identifier, data length code and data are sequentially
stored in a receive buffer, providing there is one free. If there is no free
buffer, the data overrun condition will be signalled.
On acceptance the receive buffer status bit is set to full and the
receive interrupt bit is set (provided RIE = enabled).
MC68HC05X4
86
Motorola CAN
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