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MC68HC05X4 Datasheet, PDF (31/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
CPU
CPU Registers
interrupt vector. If an interrupt request occurs while the interrupt mask is
set, the interrupt request is latched. Normally, the CPU processes the
latched interrupt as soon as the interrupt mask is cleared again.
A return from interrupt (RTI) instruction pulls the CPU registers from the
stack, restoring the interrupt mask to its cleared state. After any reset,
the interrupt mask is set and can be cleared only by a software
instruction.
Negative Flag
The CPU sets the negative flag when an arithmetic operation, logical
operation, or data manipulation produces a negative result.
Zero Flag
The CPU sets the zero flag when an arithmetic operation, logical
operation, or data manipulation produces a result of $00.
Carry/Borrow Flag
The CPU sets the carry/borrow flag when an addition operation
produces a carry out of bit 7 of the accumulator or when a subtraction
operation requires a borrow. Some logical operations and data
manipulation instructions also clear or set the carry/borrow flag.
5-cpu
MOTOROLA
CPU
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Go to: www.freescale.com
MC68HC05X4 Rev 1.0
31