MC68HC05X4 Datasheet, PDF (104/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Core Timer
Freescale Semiconductor, Inc.
Internal bus
8
Internal processor clock
$09 CTCR
(Core timer counter)
8
f_OP / 2¹⁰
f_OP / 2²
f_OP
( ÷4 )
Overflow
detect
circuit
7-bit counter
f_OP / 2¹⁷
RTI select circuit
f_OP / 2¹⁴
$08 CTCSR
(Core timer control & status)
CTOF RTIF CTOE RTIE 0
8
0 RT1 RT0
Interrupt circuit
COP
clear
COP watchdog
timer
( ÷8 )
To
To interrupt logic
reset
logic
Figure 1. Core timer block diagram
flags, are located in the CTIMER control and status register (CTCSR) at
location $08.
CTOF (core timer overflow flag) is a read-only status bit which is set
when the 8-bit ripple counter rolls over from $FF to $00. A CPU interrupt
request will be generated if CTOE is set. Clearing CTOF is done by
writing a ‘0’ to it . Writing a ‘1’ to CTOF has no effect on the bit’s value.
Reset clears CTOF.
MC68HC05X4 Rev 1.0
104
Core Timer
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2-ctimer
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