MC68HC05X4 Datasheet, PDF (64/156 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel input/output ports
Input/output programming
Bi-directional port lines may be programmed as inputs or outputs under
software control. The direction of each pin is determined by the state of
the corresponding bit in the port data direction register (DDR). Each port
has an associated DDR. Any I/O port pin is configured as an output if its
corresponding DDR bit is set. A pin is configured as an input if its
corresponding DDR bit is cleared.
At power-on or reset, all DDRs are cleared, thus configuring all port pins
as inputs. The data direction registers can be written to or read by the
processor. During the programmed output state, a read of the data
register actually reads the value of the output data latch and not the I/O
pin. Refer to Figure 1 and Table 1.
Data direction
register bit
DDRn
Latched data
register bit
DATA
O/P
data
buffer
Output
buffer
Input
buffer
I/O
Pin
Output
Input
DDRn

1
1

0
0
DATA
0
1
0
1
I/O pin
0
1
tristate
tristate
Figure 1. Standard I/O port structure
Port A
Port A is an 8-bit bi-directional port. The port A data register is at $0000
and the data direction register (DDR) is at $0004. Reset does not affect
the data register, but clears the data direction register, thereby returning
the ports to inputs. Writing a ‘1’ to a DDR bit sets the corresponding port
pin to output mode.
MC68HC05X4 Rev 1.0
64
Parallel input/output ports
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2-ports
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