MC68HC705C8A Datasheet, PDF (68/222 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Low-Power Modes
STOP
STOP OSCILLATOR
AND ALL CLOCKS
CLEAR I BIT
WAIT
OSCILLATOR ACTIVE
TIMER, SCI, AND SPI
CLOCKS ACTIVE
CPU CLOCKS STOPPED
CLEAR I BIT
NO
EXTERNAL
INTERRUPT
NO
(IRQ)
YES
RESET
YES
TURN ON OSCILLATOR
WAIT FOR TIME
DELAY TO STABILIZE
1. FETCH RESET VECTOR
OR
2. SERVICE INTERRUPT:
a. STACK
b. SET I BIT
c. VECTOR TO
INTERRUPT ROUTINE
NO
RESET
YES
EXTERNAL
INTERRUPT
NO
(IRQ)
RESTART CPU CLOCK
YES
YES
INTERNAL TIMER
INTERRUPT
NO
YES
INTERNAL SCI
INTERRUPT
1. FETCH RESET VECTOR
OR
2. SERVICE INTERRUPT:
a. STACK
b. SET I BIT
c. VECTOR TO
INTERRUPT ROUTINE
NO
YES
INTERNAL SPI
NO
INTERRUPT
Figure 6-1. Stop/Wait Mode Function Flowchart
During stop mode, the I bit in the condition code register (CCR) is
cleared to enable external interrupts. All other registers and memory
remain unaltered. All input/output (I/O) lines remain unchanged. The
processor can be brought out of stop mode only by an external interrupt
or reset.
Technical Data
68
Low-Power Modes
MC68HC705C8A — Rev. 2.0
MOTOROLA