MC68HC705C8A Datasheet, PDF (133/222 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Serial Communications Interface (SCI)
SCI I/O Registers
OR — Receiver Overrun Bit
This clearable, read-only bit is set if the SCDR is not read before the
receive shift register receives the next word. OR generates an
interrupt request if the RIE bit in SCCR2 is also set. The data in the
shift register is lost, but the data already in the SCDR is not affected.
Clear the OR bit by reading the SCSR with OR set and then reading
the SCDR. Reset clears the OR bit.
1 = Receiver shift register full and RDRF = 1
0 = No receiver overrun
NF — Receiver Noise Flag Bit
This clearable, read-only bit is set when noise is detected in data
received in the SCI data register. Clear the NF bit by reading the
SCSR and then reading the SCDR. Reset clears the NF bit.
1 = Noise detected in SCDR
0 = No noise detected in SCDR
FE — Receiver Framing Error Bit
This clearable, read-only flag is set when a logic 0 is located where a
stop bit should be in the character shifted into the receive shift
register. If the received word causes both a framing error and an
overrun error, the OR bit is set and the FE bit is not set. Clear the FE
bit by reading the SCSR and then reading the SCDR. Reset clears the
FE bit.
1 = Framing error
0 = No framing error
MC68HC705C8A — Rev. 2.0
MOTOROLA
Serial Communications Interface (SCI)
Technical Data
133