MC68HC705C8A Datasheet, PDF (56/222 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Interrupts
UNSTACKING
•
ORDER
•
•
$00C0 (BOTTOM OF STACK)
$00C1
$00C2
•
•
•
5
1
4
2
3
3
2
4
1
5
CONDITION CODE REGISTER
ACCUMULATOR
INDEX REGISTER
PROGRAM COUNTER (HIGH BYTE)
PROGRAM COUNTER (LOW BYTE)
STACKING
ORDER
•
•
•
•
•
•
$00FD
$00FE
$00FF (TOP OF STACK)
Figure 4-4. Interrupt Stacking Order
NOTE:
If more than one interrupt request is pending, the CPU fetches the vector
of the higher priority interrupt first. A higher priority interrupt does not
interrupt a lower priority interrupt service routine unless the lower priority
interrupt service routine clears the I bit. See Table 4-1 for a priority
listing.
Figure 4-5 shows the sequence of events caused by an interrupt.
Technical Data
56
Interrupts
MC68HC705C8A — Rev. 2.0
MOTOROLA