N25Q00AA11GSF40F Datasheet, PDF (4/89 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase

1Gb, 3V, Multiple I/O Serial NOR Flash Memory
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 7
Figure 2: 24-Ball LBGA (Balls Down) ................................................................................................................. 8
Figure 3: 16-Pin, Plastic Small Outline — SO16 (Top View) ................................................................................ 8
Figure 4: Block Diagram ................................................................................................................................ 11
Figure 5: Bus Master and Memory Devices on the SPI Bus ............................................................................... 17
Figure 6: SPI Modes ....................................................................................................................................... 17
Figure 7: Internal Configuration Register ........................................................................................................ 19
Figure 8: Upper and Lower Memory Array Segments ....................................................................................... 24
Figure 9: READ REGISTER Command ............................................................................................................ 32
Figure 10: WRITE REGISTER Command ......................................................................................................... 34
Figure 11: READ LOCK REGISTER Command ................................................................................................. 36
Figure 12: WRITE LOCK REGISTER Command ............................................................................................... 37
Figure 13: READ ID and MULTIPLE I/O Read ID Commands .......................................................................... 39
Figure 14: READ Command ........................................................................................................................... 46
Figure 15: FAST READ Command ................................................................................................................... 46
Figure 16: DUAL OUTPUT FAST READ Command .......................................................................................... 47
Figure 17: DUAL INPUT/OUTPUT FAST READ Command .............................................................................. 47
Figure 18: QUAD OUTPUT FAST READ Command ......................................................................................... 48
Figure 19: QUAD INPUT/OUTPUT FAST READ Command ............................................................................. 48
Figure 20: FAST READ Command – DTR ......................................................................................................... 50
Figure 21: DUAL OUTPUT FAST READ Command – DTR ................................................................................ 51
Figure 22: DUAL INPUT/OUTPUT FAST READ Command – DTR .................................................................... 51
Figure 23: QUAD OUTPUT FAST READ Command – DTR ............................................................................... 52
Figure 24: QUAD INPUT/OUTPUT FAST READ Command – DTR ................................................................... 52
Figure 25: PAGE PROGRAM Command .......................................................................................................... 55
Figure 26: DUAL INPUT FAST PROGRAM Command ...................................................................................... 56
Figure 27: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 56
Figure 28: QUAD INPUT FAST PROGRAM Command ..................................................................................... 57
Figure 29: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 58
Figure 30: WRITE ENABLE and WRITE DISABLE Command Sequence ............................................................ 60
Figure 31: SUBSECTOR and SECTOR ERASE Command .................................................................................. 62
Figure 32: DIE ERASE Command ................................................................................................................... 63
Figure 33: RESET ENABLE and RESET MEMORY Command ........................................................................... 66
Figure 34: READ OTP Command .................................................................................................................... 67
Figure 35: PROGRAM OTP Command ............................................................................................................ 68
Figure 36: XIP Mode Directly After Power-On .................................................................................................. 71
Figure 37: Power-Up Timing .......................................................................................................................... 73
Figure 38: Reset AC Timing During PROGRAM or ERASE Cycle ........................................................................ 76
Figure 39: Reset Enable ................................................................................................................................. 76
Figure 40: Serial Input Timing ........................................................................................................................ 76
Figure 41: Hold Timing .................................................................................................................................. 77
Figure 42: Output Timing .............................................................................................................................. 77
Figure 43: V_PPH Timing .................................................................................................................................. 78
Figure 44: AC Timing Input/Output Reference Levels ...................................................................................... 80
Figure 45: L-PBGA-24b05/6mm x 8mm .......................................................................................................... 84
Figure 46: SOP2-16/300 mils .......................................................................................................................... 85
PDF: 09005aef8480cede
n25q_1gb_3V_65nm.pdf - Rev. M 03/14 EN
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