N25Q00AA11GSF40F Datasheet, PDF (11/89 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase

1Gb, 3V, Multiple I/O Serial NOR Flash Memory
Memory Organization
Memory Organization
Memory Configuration and Block Diagram
The memory is a stacked device comprised of four 256Mb chips. Each chip is internally
partitioned into two 128Mb segments. Each page of memory can be individually pro-
grammed. Bits are programmed from one through zero. The device is subsector, sector,
or single 256Mb chip erasable, but not page-erasable. Bits are erased from zero through
one. The memory is configured as 134,217,728 bytes (8 bits each); 2048 sectors (64KB
each); 32,768 subsectors (4KB each); and 524,288 pages (256 bytes each); and 64 OTP
bytes are located outside the main memory array.
Figure 4: Block Diagram
HOLD#
W#/V_PP
S#
C
DQ0
DQ1
DQ2
DQ3
Control logic
Address register
and counter
High voltage
generator
64 OTP bytes
I/O shift register
256 byte
data buffer
Status
register
07FFFFFFh
PDF: 09005aef8480cede
n25q_1gb_3V_65nm.pdf - Rev. M 03/14 EN
0000000h
00000FFh
256 bytes (page size)
X decoder
11
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