PIC17C44 Datasheet, PDF (98/241 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
TABLE 13-9: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE TRANSMISSION
Address
Name
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on all
other resets
(Note1)
16h, Bank 1 PIR
RBIF TMR3IF TMR2IF TMR1IF CA2IF CA1IF
TXIF
RCIF
0000 0010
13h, Bank 0 RCSTA
SPEN RX9 SREN CREN —
FERR OERR
RX9D 0000 -00x
16h, Bank 0 TXREG
TX7
TX6
TX5
TX4
TX3
TX2
TX1
TX0
xxxx xxxx
17h, Bank 1 PIE
RBIE TMR3IE TMR2IE TMR1IE CA2IE CA1IE
TXIE
RCIE
0000 0000
15h, Bank 0 TXSTA
CSRC TX9 TXEN SYNC —
—
TRMT
TX9D 0000 --1x
17h, Bank 0 SPBRG Baud rate generator register
xxxx xxxx
Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used for synchronous
slave transmission.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
0000 0010
0000 -00u
uuuu uuuu
0000 0000
0000 --1u
uuuu uuuu
TABLE 13-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION
Address
Name
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on all
other resets
(Note1)
16h, Bank1 PIR
RBIF TMR3IF TMR2IF TMR1IF CA2IF CA1IF
TXIF
RCIF
0000 0010
13h, Bank0 RCSTA
SPEN RX9 SREN CREN —
FERR OERR
RX9D 0000 -00x
14h, Bank0 RCREG
RX7
RX6
RX5
RX4
RX3
RX2
RX1
RX0
xxxx xxxx
17h, Bank1 PIE
RBIE TMR3IE TMR2IE TMR1IE CA2IE CA1IE
TXIE
RCIE
0000 0000
15h, Bank 0 TXSTA
CSRC TX9 TXEN SYNC —
—
TRMT
TX9D 0000 --1x
17h, Bank0 SPBRG Baud rate generator register
xxxx xxxx
Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', shaded cells are not used for synchronous
slave reception.
Note 1: Other (non power-up) resets include: external reset through MCLR and Watchdog Timer Reset.
0000 0010
0000 -00u
uuuu uuuu
0000 0000
0000 --1u
uuuu uuuu
DS30412C-page 98
© 1996 Microchip Technology Inc.