PIC17C44 Datasheet, PDF (62/241 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

PIC17C4X
9.4.1 PORTE AND DDRE REGISTER
PORTE is a 3-bit bi-directional port. The corresponding
data direction register is DDRE. A '1' in DDRE config-
ures the corresponding port pin as an input. A '0' in the
DDRE register configures the corresponding port pin
as an output. Reading PORTE reads the status of the
pins, whereas writing to it will write to the port latch.
PORTE is multiplexed with the system bus. When
operating as the system bus, PORTE contains the con-
trol signals for the address/data bus (AD15:AD0).
These control signals are Address Latch Enable (ALE),
Output Enable (OE), and Write (WR). The control sig-
nals OE and WR are active low signals. The timing for
the system bus is shown in the Electrical Characteris-
tics section.
Note:
This port is configured as the system bus
when the device’s configuration bits are
selected to Microprocessor or Extended
Microcontroller modes. In the two other
microcontroller modes, this port is a gen-
eral purpose I/O.
Example 9-4 shows the instruction sequence to initial-
ize PORTE. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized.
EXAMPLE 9-4: INITIALIZING PORTE
MOVLB 1
CLRF PORTE
MOVLW 0x03
MOVWF DDRE
; Select Bank 1
; Initialize PORTE data
; latches before setting
; the data direction
; register
; Value used to initialize
; data direction
; Set RE<1:0> as inputs
; RE<2> as outputs
; RE<7:3> are always
; read as '0'
FIGURE 9-8: PORTE BLOCK DIAGRAM (IN I/O PORT MODE)
TTL
Input
Buffer
0 ^Port Q
D
1 ^Data
CK
Data Bus
RD_PORTE
WR_PORTE
Q
D
CK
RS
Note: I/O pins have protection diodes to VDD and Vss.
RD_DDRE
WR_DDRE
EX_EN
CNTL
DRV_SYS
SYS BUS
Control
DS30412C-page 62
© 1996 Microchip Technology Inc.