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PIC17C44 Datasheet, PDF (39/241 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM/ROM Microcontroller | |||
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6.3 Stack Operation
The PIC17C4X devices have a 16 x 16-bit wide hard-
ware stack (Figure 6-1). The stack is not part of either
the program or data memory space, and the stack
pointer is neither readable nor writable. The PC is
âPUSHedâ onto the stack when a CALL instruction is
executed or an interrupt is acknowledged. The stack is
âPOPedâ in the event of a RETURN, RETLW, or a RETFIE
instruction execution. PCLATH is not affected by a
âPUSHâ or a âPOPâ operation.
The stack operates as a circular buffer, with the stack
pointer initialized to '0' after all resets. There is a stack
available bit (STKAV) to allow software to ensure that
the stack has not overï¬owed. The STKAV bit is set after
a device reset. When the stack pointer equals Fh,
STKAV is cleared. When the stack pointer rolls over
from Fh to 0h, the STKAV bit will be held clear until a
device reset.
Note 1: There is not a status bit for stack under-
ï¬ow. The STKAV bit can be used to detect
the underï¬ow which results in the stack
pointer being at the top of stack.
Note 2: There are no instruction mnemonics
called PUSH or POP. These are actions
that occur from the execution of the CALL,
RETURN, RETLW, and RETFIE instruc-
tions, or the vectoring to an interrupt vec-
tor.
Note 3: After a reset, if a âPOPâ operation occurs
before a âPUSHâ operation, the STKAV bit
will be cleared. This will appear as if the
stack is full (underï¬ow has occurred). If a
âPUSHâ operation occurs next (before
another âPOPâ), the STKAV bit will be
locked clear. Only a device reset will
cause this bit to set.
After the device is âPUSHedâ sixteen times (without a
âPOPâ), the seventeenth push overwrites the value
from the ï¬rst push. The eighteenth push overwrites the
second push (and so on).
PIC17C4X
6.4 Indirect Addressing
Indirect addressing is a mode of addressing data
memory where the data memory address in the
instruction is not ï¬xed. That is, the register that is to be
read or written can be modiï¬ed by the program. This
can be useful for data tables in the data memory.
Figure 6-10 shows the operation of indirect address-
ing. This shows the moving of the value to the data
memory address speciï¬ed by the value of the FSR
register.
Example 6-1 shows the use of indirect addressing to
clear RAM in a minimum number of instructions. A
similar concept could be used to move a deï¬ned num-
ber of bytes (block) of data to the USART transmit reg-
ister (TXREG). The starting address of the block of
data to be transmitted could easily be modiï¬ed by the
program.
FIGURE 6-10: INDIRECT ADDRESSING
RAM
Instruction
Executed
Opcode
Instruction
Fetched
Opcode
Address
File = INDFx
File
FSR
© 1996 Microchip Technology Inc.
DS30412C-page 39
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