PIC16F1938_13 Datasheet, PDF (96/488 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver

PIC16(L)F1938/9
REGISTER 7-7: PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
R/W-0/0
—
bit 7
R/W-0/0
CCP5IF
R/W-0/0
CCP4IF
R/W-0/0
CCP3IF
R/W-0/0
TMR6IF
R/W-0/0
—
R/W-0/0
TMR4IF
R/W-0/0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
Unimplemented: Read as ‘0’
bit 6
CCP5IF: CCP5 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 5
CCP4IF: CCP4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 4
CCP3IF: CCP3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 3
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 2
Unimplemented: Read as ‘0’
bit 1
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
bit 0
Unimplemented: Read as ‘0’
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
DS40001574C-page 96
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