PIC16F1938_13 Datasheet, PDF (268/488 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver

PIC16(L)F1938/9
24.6.4
I²C MASTER MODE START
CONDITION TIMING
To initiate a Start condition, the user sets the Start
Enable bit, SEN bit of the SSPCON2 register. If the
SDA and SCL pins are sampled high, the Baud Rate
Generator is reloaded with the contents of
SSPADD<7:0> and starts its count. If SCL and SDA
are both sampled high when the Baud Rate Generator
times out (TBRG), the SDA pin is driven low. The action
of the SDA being driven low while SCL is high is the
Start condition and causes the S bit of the SSPSTAT1
register to be set. Following this, the Baud Rate
Generator is reloaded with the contents of
SSPADD<7:0> and resumes its count. When the Baud
Rate Generator times out (TBRG), the SEN bit of the
SSPCON2 register will be automatically cleared by
FIGURE 24-26: FIRST START BIT TIMING
hardware; the Baud Rate Generator is suspended,
leaving the SDA line held low and the Start condition is
complete.
Note 1: If at the beginning of the Start condition,
the SDA and SCL pins are already sam-
pled low, or if during the Start condition,
the SCL line is sampled low before the
SDA line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLIF, is set, the Start condition is
aborted and the I²C module is reset into
its Idle state.
2: The Philips I²C™ Specification states that
a bus collision cannot occur on a Start.
Write to SEN bit occurs here Set S bit (SSPSTAT<3>)
SDA = 1,
SCL = 1
TBRG
TBRG
At completion of Start bit,
hardware clears SEN bit
and sets SSPIF bit
Write to SSPBUF occurs here
SDA
1st bit
2nd bit
SCL
TBRG
S
TBRG
DS40001574C-page 268
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