PIC16F1938_13 Datasheet, PDF (36/488 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver

PIC16(L)F1938/9
TABLE 3-10: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 4
200h⁽²⁾ INDF0
201h⁽²⁾ INDF1
202h⁽²⁾ PCL
203h⁽²⁾ STATUS
204h⁽²⁾ FSR0L
205h⁽²⁾ FSR0H
206h⁽²⁾ FSR1L
207h⁽²⁾ FSR1H
208h⁽²⁾ BSR
209h⁽²⁾ WREG
20Ah^{(1, 2)} PCLATH
20Bh⁽²⁾ INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
DC
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
— Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 0000 0000 0000
20Ch
—
Unimplemented
—
—
20Dh
WPUB
WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 1111 1111 1111 1111
20Eh
—
Unimplemented
—
—
20Fh
—
Unimplemented
—
—
210h
WPUE
—
—
—
—
WPUE3
—
—
— ---- 1--- ---- 1---
211h
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx uuuu uuuu
212h
SSPADD
ADD<7:0>
0000 0000 0000 0000
213h
SSPMSK
MSK<7:0>
1111 1111 1111 1111
214h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF 0000 0000 0000 0000
215h
SSPCON1
WCOL SSPOV SSPEN
CKP
SSPM<3:0>
0000 0000 0000 0000
216h
SSPCON2
GCEN ACKSTAT ACKDT ACKEN
RCEN
PEN
RSEN
SEN 0000 0000 0000 0000
217h
SSPCON3
ACKTIM
PCIE
SCIE
BOEN
SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000
218h
—
Unimplemented
—
—
219h
—
Unimplemented
—
—
21Ah
—
Unimplemented
—
—
21Bh
—
Unimplemented
—
—
21Ch
—
Unimplemented
—
—
21Dh
—
Unimplemented
—
—
21Eh
—
Unimplemented
—
—
21Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
3:
4:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<14:8>, whose contents are
transferred to the upper byte of the program counter.
These registers can be addressed from any bank.
These registers/bits are not implemented on PIC16(L)F1938 devices, read as ‘0’.
Unimplemented, read as ‘1’.
DS40001574C-page 36
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