PIC16F627A_05 Datasheet, PDF (83/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F627A/628A/648A
FIGURE 12-5:
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
RB1/RX/DT (Pin)
RCV Shift Reg
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
RCV Buffer Reg
Read RCV
Buffer Reg
RCREG
bit 8 = 0, Data Byte
bit 8 = 1, Address Byte
Word 1
RCREG
RCIF
(interrupt flag)
ADEN = 1
‘1’
‘1’
(Address Match
Enable)
Note: This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG
(Receive Buffer) because ADEN = 1 and bit 8 = 0.
FIGURE 12-6:
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
RB1/RX/DT (pin)
RCV Shift Reg
RCV Buffer Reg
Read RCV
Buffer Reg
RCREG
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
bit 8 = 1, Address Byte
Word 1
RCREG
bit 8 = 0, Data Byte
RCIF
(Interrupt Flag)
ADEN = 1
‘1’
‘1’
(Address Match
Enable)
Note: This timing diagram shows an address byte followed by an data byte. The data byte is not read into the RCREG
(receive buffer) because ADEN was not updated (still = 1) and bit 8 = 0.
FIGURE 12-7:
RB1/RX/DT (pin)
RCV Shift
Reg
RCV Buffer Reg
Read RCV
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
ADEN
(Address Match
Enable)
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST FOLLOWED BY
VALID DATA BYTE
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
bit 8 = 1, Address Byte
Word 1 _{bit 8 = 0, Data Byte}
RCREG
Word 2
RCREG
Note:
This timing diagram shows an address byte followed by an data byte. The data byte is read into the RCREG
(Receive Buffer) because ADEN was updated after an address match, and was cleared to a ‘0’, so the contents
of the Receive Shift Register (RSR) are read into the Receive Buffer regardless of the value of bit 8.
© 2005 Microchip Technology Inc.
DS40044D-page 81