PIC16F627A_05 Datasheet, PDF (122/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F627A/628A/648A
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Clear W
[ label ] CLRW
None
00h → (W)
1→Z
Z
00
0001 0000 0011
W register is cleared. Zero bit
(Z) is set.
1
1
CLRW
Before Instruction
W = 0x5A
After Instruction
W = 0x00
Z =1
CLRWDT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Clear Watchdog Timer
[ label ] CLRWDT
None
00h → WDT
0 → WDT prescaler,
1 → TO
1 → PD
TO, PD
00
0000 0110 0100
CLRWDT instruction resets the
Watchdog Timer. It also resets
the prescaler of the WDT. Status
bits TO and PD are set.
1
1
CLRWDT
Before Instruction
WDT counter = ?
After Instruction
WDT counter = 0x00
WDT prescaler = 0
TO
=1
PD
=1
COMF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Complement f
[ label ] COMF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) → (dest)
Z
00
1001 dfff ffff
The contents of register ‘f’ are
complemented. If ‘d’ is ‘0’, the
result is stored in W. If ‘d’ is ‘1’,
the result is stored back in
register ‘f’.
1
1
COMF REG1, 0
Before Instruction
REG1 = 0x13
After Instruction
REG1 = 0x13
W
= 0xEC
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Decrement f
[ label ] DECF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f) - 1 → (dest)
Z
00 0011 dfff ffff
Decrement register ‘f’. If ‘d’ is
‘0’. the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
1
1
DECF CNT, 1
Before Instruction
CNT = 0x01
Z =0
After Instruction
CNT = 0x00
Z =1
DS40044D-page 120
© 2005 Microchip Technology Inc.