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PIC16F627A_05 Datasheet, PDF (58/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology
PIC16F627A/628A/648A
9.1 Capture Mode
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RB3/CCP1. An event is defined as:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M<3:0>
(CCP1CON<3:0>). When a capture is made, the
interrupt request flag bit CCP1IF (PIR1<2>) is set. It
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old
captured value will be lost.
9.1.1 CCP PIN CONFIGURATION
In Capture mode, the RB3/CCP1 pin should be config-
ured as an input by setting the TRISB<3> bit.
Note:
If the RB3/CCP1 is configured as an
output, a write to the port can cause a
capture condition.
FIGURE 9-1:
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
RB3/CCP1
pin
Set flag bit CCP1IF
Prescaler
(PIR1<2>)
³ 1, 4, 16
CCPR1H
and
edge detect
Capture
Enable
CCP1CON<3:0>
Q’s
TMR1H
CCPR1L
TMR1L
9.1.2 TIMER1 MODE SELECTION
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
9.1.3 SOFTWARE INTERRUPT
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in Operating mode.
9.1.4 CCP PRESCALER
There are four prescaler settings, specified by bits
CCP1M<3:0>. Whenever the CCP module is turned
off, or the CCP module is not in Capture mode, the
prescaler counter is cleared. This means that any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will not
be cleared, therefore the first capture may be from a
non-zero prescaler. Example 9-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 9-1:
CHANGING BETWEEN
CAPTURE PRESCALERS
CLRF
MOVLW
MOVWF
CCP1CON ;Turn CCP module off
NEW_CAPT_PS ;Load the W reg with
; the new prescaler
; mode value and CCP ON
CCP1CON ;Load CCP1CON with this
; value
9.2 Compare Mode
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RB3/CCP1 pin is:
• Driven high
• Driven low
• Remains unchanged
The action on the pin is based on the value of control
bits CCP1M<3:0> (CCP1CON<3:0>). At the same
time, interrupt flag bit CCP1IF is set.
FIGURE 9-2:
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Set flag bit CCP1IF
(PIR1<2>)
CCPR1H CCPR1L
Q
RB3/CCP1
pin
TRISB<3>
Output Enable
S Output
Logic
R
match
CCP1CON<3:0>
Mode Select
Comparator
TMR1H TMR1L
Note:
Special event trigger will reset Timer1, but not
set interrupt flag bit TMR1IF (PIR1<0>).
DS40044D-page 56
© 2005 Microchip Technology Inc.