PIC16F627A_05 Datasheet, PDF (106/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F627A/628A/648A
TABLE 14-7: INITIALIZATION CONDITION FOR REGISTERS
Register
Address
Power-on Reset
• MCLR Reset during normal
operation
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset ⁽¹⁾
• Wake-up from Sleep⁽⁷⁾ through
interrupt
• Wake-up from Sleep⁽⁷⁾ through
WDT time out
W
—
xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF
00h, 80h,
—
—
—
100h, 180h
TMR0
PCL
STATUS
01h, 101h
02h, 82h,
102h, 182h
03h, 83h,
103h, 183h
xxxx xxxx
0000 0000
0001 1xxx
uuuu uuuu
0000 0000
000q quuu⁽⁴⁾
uuuu uuuu
PC + 1⁽³⁾
uuuq 0uuu⁽⁴⁾
FSR
04h, 84h,
104h, 184h
xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTA
05h
xxxx 0000
xxxx 0000
uuuu uuuu
PORTB
06h, 106h
xxxx xxxx
uuuu uuuu
uuuu uuuu
PCLATH
INTCON
0Ah, 8Ah,
10Ah, 18Ah
0Bh, 8Bh,
10Bh,18Bh
---0 0000
0000 000x
---0 0000
0000 000u
---u uuuu
uuuu uqqq⁽²⁾
PIR1
0Ch
0000 -000
0000 -000
qqqq -qqq⁽²⁾
TMR1L
0Eh
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1H
T1CON
0Fh
xxxx xxxx
10h
--00 0000
uuuu uuuu
--uu uuuu⁽⁶⁾
uuuu uuuu
--uu uuuu
TMR2
11h
0000 0000
0000 0000
uuuu uuuu
T2CON
12h
-000 0000
-000 0000
-uuu uuuu
CCPR1L
15h
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1H
16h
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
17h
--00 0000
--00 0000
--uu uuuu
RCSTA
18h
0000 000x
0000 000x
uuuu uuuu
TXREG
19h
0000 0000
0000 0000
uuuu uuuu
RCREG
1Ah
0000 0000
0000 0000
uuuu uuuu
CMCON
1Fh
0000 0000
0000 0000
uu-- uuuu
OPTION
81h,181h
1111 1111
1111 1111
uuuu uuuu
TRISA
85h
1111 1111
1111 1111
uuuu uuuu
TRISB
86h, 186h
1111 1111
1111 1111
uuuu uuuu
PIE1
PCON
8Ch
0000 -000
8Eh
---- 1-0x
0000 -000
---- 1-uq^(1,5)
uuuu -uuu
---- u-uu
PR2
92h
1111 1111
1111 1111
uuuu uuuu
TXSTA
98h
0000 -010
0000 -010
uuuu -uuu
SPBRG
99h
0000 0000
0000 0000
uuuu uuuu
EEDATA
9Ah
xxxx xxxx
uuuu uuuu
uuuu uuuu
EEADR
9Bh
xxxx xxxx
uuuu uuuu
uuuu uuuu
EECON1
9Ch
---- x000
---- q000
---- uuuu
EECON2
9Dh
—
—
—
VRCON
9Fh
000- 0000
000- 0000
uuu- uuuu
Legend:
Note 1:
2:
3:
4:
5:
6:
7:
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
One or more bits in INTCON and PIR1 will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
See Table 14-6 for Reset value for specific condition.
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
Reset to ‘--00 0000’ on a Brown-out Reset (BOR).
Peripherals generating interrupts for wake-up from Sleep will change the resulting bits in the associated registers.
DS40044D-page 104
© 2005 Microchip Technology Inc.