PIC16F627A_05 Datasheet, PDF (69/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F627A/628A/648A
11.0 VOLTAGE REFERENCE
MODULE
The Voltage Reference module consists of a 16-tap
resistor ladder network that provides a selectable volt-
age reference. The resistor ladder is segmented to pro-
vide two ranges of VREF values and has a power-down
function to conserve power when the reference is not
being used. The VRCON register controls the opera-
tion of the reference as shown in Figure 11-1. The
block diagram is given in Figure 11-1.
11.1 Voltage Reference Configuration
The Voltage Reference module can output 16 distinct
voltage levels for each range.
The equations used to calculate the output of the
Voltage Reference module are as follows:
if VRR = 1:
VREF
=
V----R_{----<----3---:--0--->--}
24
×
VDD
if VRR = 0:
VREF
=
⎛
⎝
VDD
×
14--_⎠⎞
+
V----R_{----<----3---:--0--->--}
32
×
VDD
The setting time of the Voltage Reference module must
be considered when changing the VREF output
(Table 17-3). Example 11-1 demonstrates how voltage
reference is configured for an output voltage of 1.25V
with VDD = 5.0V.
REGISTER 11-1:
VRCON – VOLTAGE REFERENCE CONTROL REGISTER (ADDRESS: 9Fh)
R/W-0 R/W-0 R/W-0
U-0
R/W-0
R/W-0 R/W-0 R/W-0
VREN
VROE
VRR
—
VR3
VR2
VR1
VR0
bit 7
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3-0
VREN: VREF Enable bit
1 = VREF circuit powered on
0 = VREF circuit powered down, no IDD drain
VROE: VREF Output Enable bit
1 = VREF is output on RA2 pin
0 = VREF is disconnected from RA2 pin
VRR: VREF Range Selection bit
1 = Low range
0 = High range
Unimplemented: Read as ‘0’
VR<3:0>: VREF Value Selection bits 0 ≤ VR <3:0> ≤ 15
When VRR = 1: VREF = (VR<3:0>/ 24) * VDD
When VRR = 0: VREF = 1/4 * VDD + (VR<3:0>/ 32) * VDD
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
© 2005 Microchip Technology Inc.
DS40044D-page 67