PIC16F627A_05 Datasheet, PDF (75/180 Pages) Microchip Technology – Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

PIC16F627A/628A/648A
12.1 USART Baud Rate Generator
(BRG)
The BRG supports both the Asynchronous and
Synchronous modes of the USART. It is a dedicated
8-bit baud rate generator. The SPBRG register
controls the period of a free running 8-bit timer. In
Asynchronous mode, bit BRGH (TXSTA<2>) also
controls the baud rate. In Synchronous mode, bit
BRGH is ignored. Table 12-1 shows the formula for
computation of the baud rate for different USART
modes, which only apply in Master mode (internal
clock).
Given the desired baud rate and FOSC, the nearest
integer value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
FOSC = 16 MHz
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
EQUATION 12-1: CALCULATING BAUD
RATE ERROR
Desired Baud Rate
=
------F----o---s---c-------
64(x + 1)
9600 = ^1-6--6-4---0₍--x-0---0-+--0---01---0-₎
x = 25.042
Calculated Baud Rate
=
--1---6---0---0---0---0---0---0---
64(25 + 1)
=
9615
Error
=
(--C-----a---l-c---u---l-a---t--e---d----B----a---u---d-----R---a---t--e---------D----e---s--i-r---e---d----B----a---u---d----R----a---t--e---)
Desired Baud Rate
=
-9---6---1---5----^–-----9---6---0---0-
9600
=
0.16%
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the FOSC/(16(X + 1)) equation can reduce the
baud rate error in some cases.
Writing a new value to the SPBRG register causes the
BRG timer to be reset (or cleared) and ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
The data on the RB1/RX/DT pin is sampled three times
by a majority detect circuit to determine if a high or a
low level is present at the RX pin.
TABLE 12-1: BAUD RATE FORMULA
SYNC
BRGH = 0 (Low Speed)
0
1
Legend:
(Asynchronous) Baud Rate = FOSC/(64(X+1))
(Synchronous) Baud Rate = FOSC/(4(X+1))
X = value in SPBRG (0 to 255)
BRGH = 1 (High Speed)
Baud Rate = FOSC/(16(X+1))
NA
TABLE 12-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Address Name Bit 7 Bit 6 Bit 5 Bit 4
Bit 3
Bit 2
Bit 1 Bit 0
Value on Value on all
POR
other Resets
98h
18h
99h
Legend:
TXSTA CSRC TX9 TXEN SYNC
—
BRGH TRMT TX9D 0000 -010
RCSTA SPEN RX9 SREN CREN ADEN FERR OERR RX9D 0000 000x
SPBRG Baud Rate Generator Register
0000 0000
x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for the BRG.
0000 -010
0000 000x
0000 0000
© 2005 Microchip Technology Inc.
DS40044D-page 73