PIC18FXXK80 Datasheet, PDF (8/52 Pages) Microchip Technology – Flash Microcontroller Programming Specification

PIC18FXXK80 FAMILY
2.4 Memory Maps
For PIC18FX6K80 devices, the code memory space
extends from 000000h to 00FFFFh (64 Kbytes) in four
16-Kbyte blocks. For PIC18FX5K80 devices, the code
memory space extends from 000000h to 007FFFh
(32 Kbytes) in four 8-Kbyte blocks. Addresses, 0000h
through 07FFh or 0FFFh, however, define a “Boot
Block” region that is treated separately from Block 0. All
of these blocks define code protection boundaries
within the code memory space.
The size of the Boot Block in PIC18FXXK80 devices
can be configured as 1 or 2K words (see Table 5-3).
This is done through the BBSIZ bit in the Configuration
register, CONFIG4L (see Table 5-1). It is important to
note that increasing the size of the Boot Block
decreases the size of Block 0.
TABLE 2-2: IMPLEMENTATION OF CODE
MEMORY
Device
Code Memory Size (Bytes)
PIC18F65K80
PIC18F45K80
PIC18F25K80
PIC18LF65K80
PIC18LF45K80
PIC18LF25K80
PIC18F66K80
PIC18F46K80
PIC18F26K80
PIC18LF66K80
PIC18LF46K80
PIC18LF26K80
000000h-007FFFh (32K)
000000h-00FFFFh (64K)
FIGURE 2-7:
MEMORY MAP AND THE CODE MEMORY SPACE FOR PIC18FXXK80 DEVICES⁽¹⁾
000000h
Code Memory
01FFFFh
Unimplemented
Read as ‘0’
200000h
Configuration
and ID
Space
Device/Memory Size
PIC18FX6K80
PIC18FX5K80
BBSIZ = 1 BBSIZ = 0 BBSIZ = 1 BBSIZ = 0 ^Address
Boot
Block⁽²⁾
2 KW
Block 0
6 KW
Block 1
8 KW
Block 2
8 KW
Block 3
8 KW
Boot
Block⁽²⁾
Block 0
7 KW
Block 1
8 KW
Block 2
8 KW
Block 3
8 KW
Boot
Block⁽²⁾
2 KW
Block 0
2 KW
Block 1
4 KW
Block 2
4 KW
Block 3
4 KW
Boot
Block⁽²⁾
Block 0
3 KW
Block 1
4 KW
Block 2
4 KW
Block 3
4 KW
0000h
0800h
1000h
1FFFh
2000h
3FFFh
4000h
5FFFh
6000h
7FFFh
8000h
BFFFh
C000h
FFFFh
3FFFFFh
Note 1: Sizes of memory areas are not to scale.
2: Boot block size is determined by the BBSIZ bit (CONFIG4L<4>).
DS39972B-page 8
 2011 Microchip Technology Inc.